Authors: M. Haferlach, M. Claus, M. Schröter
Affilation: TU Dresden, Germany
Pages: 512 - 517
Keywords: CNTFET, hysteresis, compact model, traps, linearity, characterization
Compared to conventional bulk semiconductors carbon nanotubes (CNTs) possess a number of properties which may make CNT technology superior for certain applications. In particular, the one-dimensional (1D) transport in CNTs leads not only to a low scattering rate and high current carrying capability but also to a linear relation between drain current and input (gate-source) voltage. For making this a mature technology, there are some serious issues that will have to be addressed. One of them is trap effects since they strongly influence the electrical behavior of the device. The type of measurement and its parameters (e.g. staircase sweeps with step lengths in the range of 1ms to 100ms) have a huge impact on the results. It is necessary to model trap effects for two reasons. 1) It may take a long time for the technology to reach a point where the devices are completely free of trap effects, and thus models are needed for circuit simulation. 2) A trap effect model can help defining the measurement conditions needed to predict trap-free device characteristics. The model also helps to understand some experimental observations such as the apparent linearity that has been observed in standard AC measurements.
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