Authors: A. Dey, A. DasGupta
Affilation: Arizona State University, United States
Pages: 797 - 800
Keywords: surrounding-gate, Lambert function, surface potential, compact model
Surrounding-Gate MOS transistors are seen as viable slternative to the problems of bulk MOSFET in deep sub-micron region. However modeling of drain current and capacitances, like other MOS structures require solution of an implicit equation. The solutions reported thus far are either numerical in nature or use smoothing functions. Numerical solution takes a lot of computational time and smoothing functions can create convergence issues while computing higher order derivatives. One of the models fail to work for low gate to drain voltages. In this paper we propose a new kind of model which is not only highly accurate and computationally more efficient than the others, but also is numerically robust over the entire region of operation and avoids the use of smoothing and empirical functions. Finally we test the model with exact numerical solution and show its accuracy and validity not only for surface potential computation but also to calculate the potential derivatives, drain current and capacitances. Also we compare the computation time with one of the efficient models developed.
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