Authors: P. Malik, R. Chaujar, M. Gupta, R.S. Gupta
Affilation: Semiconductor Devices Research Laboratory, India
Pages: 705 - 708
Keywords: ATLAS-3D, corner effect, DEVEDIT-3D, NJD, RF, TRC MOSFET
In this work, an extended study of linearity behaviour of proposed Gate Material Engineered-Trapezoidal Recessed Channel(GME-TRC) MOSFET(Fig.1.) has been performed using ATLAS and DEVEDIT device simulators and the results so obtained are compared with Trapezoidal Recessed Channel(TRC) MOSFET(Fig.1.). The influence of technology parameters such as negative junction depth (NJD), substrate doping, workfunction difference has also been investigated for the purposed design GME-TRC MOSFET. Simulation results reveal that GME-TRC MOSFET enhances the linearity performance in terms of figure of merit (FOM) metrics:VIP2, VIP3 and higher order transconductance coefficients: gm1, gm2, gm3, proving its efficacy for RFIC design and wireless application.