Authors: S. Karmakar, J.A. Chandy, F.C. Jain
Affilation: University of Connecticut, United States
Pages: 17 - 20
Keywords: ADC, QDFETs, quantum dots, 3-state devices, comparators
In this work we present Cadence simulation of 3-bit Analog-to-Digital Converters (ADCs) based on compact 3-QDFET comparators, using 32nm design rules with BSIM 3.2.0 and BSIM 3.2.4 models . In addition, we present the precise control of the threshold voltage of variable threshold voltage transistor which will remove R-2R ladder problem in conventional analog-to-digital converters(ADCs).