Authors: B. Tudor, J.W. Wang, B.P. Hu, W. Liu, F. Lee
Affilation: Synopsys, Inc., United States
Pages: 804 - 807
Keywords: HVMOS, LDMOS, EDMOS compact, model, parameter, extraction
The paper presents a high-voltage compact MOSFET model that has been proven physically accurate and numerically robust for various and generations of high-voltage ED (extended drain) and LD (laterally double diffused) production CMOS process technologies. The model’s accuracy in handling currents, conductances and capacitances, and its scalability over bias, device geometry and temperature have been proved to be consistently better compared to existing solutions.