Authors: P. Pavan, L. Larcher and A. Marmiroli
Affilation: Università di Modena e Reggio Emilia, Italy
Pages: 283 - 286
Keywords: compact model, nonvolatile memory, floating gate, reliability, circuit design
This paper describes a possible approach to Compact Modeling of Floating Gate devices. Floating Gate devices are the basic building blocks of Semiconductor Nonvolatile Memories (EPROM, EEPROM, Flash). Among these, Flash are the most innovative and complex devices. The strategy followed developing this new model allows to cover a wide range of simulation conditions, making it very appealing for device physicists and circuit designers.
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