Authors: M. Janicki, T. Torzewicz, Z. Kulesza, A. Napieralski
Affilation: Technical University of Lodz, Poland
Pages: 833 - 836
Keywords: compact thermal models
This paper presents a methodology to create compact thermal models of electronic systems. The models have a form of Cauer RC ladders and the values of their elements can be attributed physical significance. The methodology is illustrated based on a practical example of a discrete power device. The measurements are taken on a special dual cold plate stand which renders possible to vary cooling conditions without the necessity of disassembling the entire setup. Moreover, the paper demonstrates that the values of model elements in the stages close to the junction do not depend on cooling conditions, thus the generated model of the packaged semiconductor structure can be regarded as a boundary condition independent one. Such compact thermal models can be easily integrated in standard circuit simulaters for electro-thermal simulations of circuits and systems.