Inverter Circuits Based on Low-Temperature Solution-Processed ZnO Nanoparticle Thin-Film Transistors

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Promising enhancement-load inverter cuircuits using bottom-gated ZnO nanoparticle thin-film transistors and a poly(4-vinylphenol) (PVP) dielectric are demonstrated. The deposition of the ZnO active layer is done by spin coating of a colloidal dispersion. Due to low process temperatures (<200°C), the presented device is suitable for plastic substrates and integration by printing techniques. The field-effect mobility and on/off-ratio of individual transistors are 3 • 10^-3 cm^2/(Vs) and 10^5, respectively, which is sufficient for low-cost/low-performance applications. However, the PVP causes hysteresis because of charge trapping. Although hysteresis is also observed for inverter circuits, the voltage transfer characteristics are reasonable with a gain in the range of 3 to 5.5 at a supply voltage between 10V and 15V. The static power dissipation density is approximately 2nW/um^2 and even less than in devices integrated by sputter deposition, ALD or PLD. Therefore, the proposed devices are promising for future nanoparticle-based logic circuits.

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Journal: TechConnect Briefs
Volume: 1, Nanotechnology 2011: Advanced Materials, CNTs, Particles, Films and Composites
Published: June 13, 2011
Pages: 347 - 350
Industry sector: Advanced Materials & Manufacturing
Topic: Nanoparticle Synthesis & Applications
ISBN: 978-1-4398-7142-3