Nano Science and Technology Institute
Nanotech 2010 Vol. 2
Nanotech 2010 Vol. 2
Nanotechnology 2010: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational

Chapter 11:

Compact Modeling

-Theory of Bipolar MOSFET (BiFET) with Electrically Short Channels
 B.B. Jie, C-T. Sah
 Univesity of Florida, US
-Non-Charge-Sheet Analytic Model for Ideal Retrograde Doping MOSFETs
 Z. Zhou, J. Zhang, X. Zhou, X. Lin, J. He
 Peking University, CN
-Impact of Gate-Induced-Drain-Leakage current modeling on circuit simulations in 45nm SOI technology and beyond
 H. Wang, R. Williams, L. Wagner, J. Johnson, P. Hyde, S. Springer
 IBM, US
-Modeling of Gate Leakage, Floating Body Effect, and History Effect in 32nm HKMG PD-SOI CMOS
 Y. Deng, R.A. Rupani, J. Johnson, S. Springer
 IBM, US
-A Unified Charge-Based Model for SOI MOSFETs Valid from Intrinsic to Heavily Doped Channel
 J. Zhang, J. He, L. Zhang, X. Zhou, Z. Zhou
 Peking University, CN
-Subthreshold Quantum Ballistic Current and Quantum Threshold Voltage Modeling for Nanoscale FinFET
 U. Monga, T.A. Fjeldly
 UniK/Norwegian University of Science and Technology, NO
-Electrostatic Potential Compact Model for Symmetric and Asymmetric Lightly Doped DG-MOSFET Devices
 H. Abebe, E. Cumberbatch, S. Uno, V. Tyree
 USC/ISI, US
-Analytic Channel Potential Solution of Symmetric DG AMOSFETs
 L. Chen, Y. Xu, L. Zhang, X. Zhou, W. Zhou, J. He
 Peking University, CN
-Source/Drain Edge Modeling for DG MOSFET Compact Model
 T. Nakagawa, S. O’uchi, T. Sekigawa, T. Tsutsumi, M. Hioki, H. Koike
 AIST (National Institute of Advanced Industrial Science and Technology), JP
-Xsim: Benchmark Tests for the Unified DG/GAA MOSFET Compact Model
 X. Zhou, G.J. Zhu, M.K. Srikanth, S.H. Lin, Z.H. Chen, J.B. Zhang, C.Q. Wei, Y.F. Yan, R. Selvakumar
 Nanyang Technological University, SG
-Analytical Modeling of the Subthreshold Electrostatics of Nanoscale GAA Square Gate MOSFETs
 S.K. Vishvakarma, T.A. Fjeldly
 Norwegian University of Science and Technology, NO
-A Continuous Compact Model of Short-Channel Effects for Undoped Cylindrical Gate-All-Around MOSFETs
 B. Cousin, M. Reyboz, O. Rozeau, M.-A. Jaud, T. Ernst, J. Jomaah
 CEA, LETI, MINATEC, FR
-Analytical Solution of Surface Potential for Un-Doped Surrounding-Gate MOSFET
 A. Dey, A. DasGupta
 Arizona State University, US
-Analytical model of quantum threshold voltage in short-channel nanowire MOSFET including band structure effects
 J. Dura, S. Martinie, D. Munteanu, M.-A. Jaud, S. Barraud, J.L. Autran
 CEA-LETI Minatec, FR
-Bias Dependence of Low Frequency Noise in 90nm CMOS
 N. Mavredakis, A. Antonopoulos, M. Bucher
 Technical University of Crete, GR
-Compact Modeling of Signal Transients for Dispersionless Interconnects With Resistive, Capacitive and Inductive Terminal Loads
 Chi Liu, Z. Zhou, X. Lin, J. Xia, X. Zhang, J. He
 Peking University, CN
-Improved Compact Model of Quantum Sub-band Energy Levels for MOSFET Device Application
 W. Feldman, E. Cumberbatch, H. Abebe
 USC/ISI, US
-Modeling of Mismatch and Across-Chip Variations in Compact Device Models
 N. Lu
 IBM, US
-Guidelines for Verilog-A Compact Model Coding
 G. Depeyrot, F. Poullet
 Dolphin Integration, FR
ISBN:978-1-4398-3402-2
Pages:862
Hardcopy:$189.95
 
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