Workshop on Compact Modeling

	Nanotech 2009 Vol. 3 Nanotechnology 2009: Biofuels, Renewable Energy, Coatings, Fluidics and Compact Modeling Chapter 9: Workshop on Compact Modeling
-	What is a Transistor?
	C. Sah, B. Jie
	University of Florida, US
-	Interface Traps in Surface-Potential-Based MOSFET Models
	Z. Chen, X. Zhou, G.H. See, Z. Zhu, G. Zhu
	Nanyang Technological University, SG
-	Analytic MOSFET Surface Potential Model with Inclusion of Poly-Gate Accumulation, Depletion, and Inversion Effects
	Y. Song, J. He, L.N. Zhang, J. Zhang
	Peking University, CN
-	HiSIM-SOI: SOI-MOSFET Model for Circuit Simulation Valid also for Device Optimization
	N. Sadachika, S. Kusu, K. Ishimura, T. Murakami, T. Kajiwara, T. Hayashi, Y. Nishikawa, T. Yoshida, M. Miura-Mattausch
	Hiroshima University, JP
-	Embedded non–volatile memory study with surface potential based model
	D. Garetto, A. Zaka, V. Quenette, D. Rideau, E. Dornel, W.F. Clark, M. Minondo, C. Tavernier, Q. Rafhay, R. Clerc, A. Schmid, Y. Leblebici, H. Jaouen
	STMicroelectronics, FR
-	Dynamic Charge Sharing modeling for surface potential based models
	V. Quenette, D. Rideau, R. Clerc, C. Tavernier, H. Jaouen
	ST Microelectronics, FR
-	Effective Width Modeling for Body-Contacted Devices in Silicon-On-Insulator Technology
	S. Khandelwal, E. Tamilmani, K. Shanbhag, J. Watts
	IBM SRDC Bangalore, IN
-	Design study of CNT transistors layouts for high frequency analog circuits
	M. Claus, M. Schröter
	Technische Universität Dresden, DE
-	Analytical Modelling of Ballistic and Quasi-Ballistic Nanowires:Validation and Application to CMOS Architecture
	S. Martinie, D. Munteanu, G. Le Carval, M.-A. Jaud, J.L. Autran
	CEA, LETI, Minatec, FR
-	MOSFET-Like Carbon Nanotube Field Effect Transistor model
	M.T. Ahmadi, Y.W. Heong, R. Ismail
	University Technology Malaysia, MY
-	Compact Quantum Modeling Framework for Nanoscale Double-Gate MOSFET
	U. Monga, T.A. Fjeldly
	Norwegian University of Science and Technology, NO
-	Compact Model HiSIM-DG both for Symmetrical and Asymmetrical DG-MOSFET Structures
	K. Ishimura, N. Sadachika, S. Kusu, M. Miura-Mattausch
	Hiroshima University, JP
-	A Unified Compact model for FinFET and Silicon Nanowire MOSFETs
	G.J. Zhu, X. Zhou, G.H. See, S.H. Lin, C.Q. Wei, J.B. Zhang
	Nanyang Technological University, SG
-	Computation Efficient yet Accurate Surface Potential Based Analytic Model for Symmetric DG MOSFETs to Predict Current-Voltage Characteristics
	Y. Song, L.N. Zhang, J. Zhang, H. Zhuang, Y.C. Che, J. He, M. Chan
	Peking University, CN
-	Compact Modeling of Dynamic Threshold Voltage of FinFET High K Gate Stack and Application in Circuit Simulation
	F. He, C. Ma, B. Li, L. Zhang, X. Zhang, X. Lin
	SZPKU, CN
-	High-Voltage MOSFET Model Valid for Device Optimization
	Y. Oritsuki, T. Sakuda, N. Sadachika, M. Miyake, T. Kajiwara, H. Kikuchihara U. Feldmann, H.J. Mattausch, M. Miura-Mattausch
	Hiroshima University, JP
-	Compare and Contrast HiSIM-LDMOS and BSIM based compact model of High Voltage MOSFETs for Analog Applications
	A. Young, J. Hall, Z. Luo, Y. Xiao, D. Connerney
	Fairchild Semiconductor, US
-	A Scalable POWER MOSFET Model with an Integrated Body-Diode Including Reverse Recovery
	Z. Luo, J. Hall, Y. Xiao, A. Young, R. Carroll, D. Connerney
	Fairchild Semiconductor, US
-	Compact Model Application to Statistical/Probabilistic Technology Variations
	X. Zhou, G. Zhu, M. Srikanth, R. Selvakumar, Y. Yan, W. Chandra, J. Zhang, S. Lin, C. Wei, and Z. Chen
	Nanyang Technological University, SG
-	Elements of Statistical SPICE Models
	N. Lu, J. Watts, S.K. Springer
	IBM, US
-	PSP Model Equations Extension for Statistical Estimation of Leakage Current in Nanometer CMOS Technologies Considering Process Variations
	C. D’Agostino, P. Flatresse, E. Beigne, M. Belleville
	STMicroelectronics, FR
-	Numerical Study of Carrier Velocity for P-type Strained Silicon MOSFET
	Y.W. Heong, M.T. Ahmadi, J.E. Suseno, R. Ismail
	Universiti Teknologi Malaysia, MY
-	RF Modeling of 45nm Low-Power CMOS Technology
	J. Wang, H. Li, L-H Pan, U. Gogineni, R. Groves, B. Jagannathan, M-H Na, W. Tonti, R. Wachnik
	IBM Semiconductor Research and Development Center, US
-	Compact Model of Low – Frequency Noise in Nanoscale Metal-Oxide-Semiconductor Field Effect Transistors
	D.A. Miller, M.E. Jacob, L. Forbes
	Oregon State University, US
-	1/f Noise Modeling at Low Temperature with the EKV3 Compact Model
	P. Martin, G. Ghibaudo
	CEA, LETI, Minatec, FR
-	1/f Noise Model for Double-Gate FinFET Biased in Weak Inversion
	C-Q Wei, Y-Z Xiong, X. Zhou
	Nanyang Technological University, SG
-	A Simple, Accurate Capacitance-Voltage Model of Undoped Silicon Nanowire MOSFETs
	S. Lin, X. Zhou, G.H. See, G. Zhu, C. Wei, J. Zhang, Z. Chen
	Nanyang Technological University, SG
-	SPICE BSIM3 Model Parameters Extraction and Optimization for Low Temperature Application
	H. Abebe, V. Tyree, N.S. Cockerham
	USC ISI/MOSIS, US
-	An SOA Aware MOSFET Model for Highly Integrated, Analog Mixed-Signal Design Environments
	J. Hall, Z. Luo, Y. Xiao, A. Young, D. Connerney
	Fairchild Semiconductor, US
-	Automatically Generated and Experimentally Validated System-Level Model of a Microelectromechanical RF Switch
	M. Niessner, G. Schrag, G. Wachutka, J. Iannacci, B. Margesin
	Munich University of Technology, DE
ISBN:	978-1-4398-1784-1
Pages:	694
Hardcopy:	$179.95

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