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 | Nanotech 2007 Vol. 3
Technical Proceedings of the 2007 NSTI Nanotechnology Conference and Trade Show, Volume 3
Chapter 7: Compact Modeling |
| | Impact of Gate Induced Drain Leakage and Impact Ionization Currents on Hysteresis Modeling of PD SOI Circuits | | Authors: | Q. Chen, S. Suryagandh, J-S Goo, J.X. An, C. Thuruthiyil and A.B. Icel | | Affilation: | Advanced Micro Devices, US | | Pages: | 570 - 573 | | Keywords: | body current, compact modeling, GIDL, hysteresis, impact ionization, PD SOI | | Abstract: | The impact of the gate induced drain leakage and impact ionization currents on hysteresis of PD FB SOI circuits is examined, and a physical understanding is provided. Measured silicon data from 90nm and 65nm PD SOI technologies indicate that both components dominate in the body currents at zero gate voltage and non-zero drain voltage. Body currents under these particular conditions are critical to pre-first-switch body voltage establishment, which is definitively validated by a compact modeling experiment. As the OFF-state channel leakage current increases in scaled technologies, these body currents need to be closely monitored and well modeled to properly predict and understand evolution of the hysteresis behavior. | | ISBN: | 1-4200-6184-4 |
| Pages: | 732 |
| Hardcopy: | $199.99 |
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