Authors: M. Saif Islam, A. Choudhry and E. Fong
Affilation: University of California- Davis, United States
Pages: 111 - 114
Keywords: semiconductor nanowire, nanoscale devices, Si nanoelectronics and photonics, CVD process
A key barrier to wide-scale integration of functional nanowires in devices and systems is the difficulty in forming reproducible and efficient contacts to them. Unlike the research-based approach of sequentially connecting electrodes to individual nanowires for device physics studies, a massively parallel and manufacturable interfacing technique is crucial for reproducible fabrication of dense and low-cost nano-device arrays. We developed a novel epitaxial interfacing technique for integrating semiconductor nanowires in devices that resulted in highly reproducible and linear ohmic contacts and contributed to exceptionally low noise. We fabricated two electrically isolated and opposing vertical Si surfaces using optical lithography along with wet and dry etching and grew lateral nanowires from one surface and epitaxially connected them to the other, forming mechanically robust and electrically continuous “nano-bridges”. Both group IV and III-V nanowires were bridged between Si electrodes. Based on our current-voltage measurements and a constructed model, we calculated the specific contact resistance to be in the range of 4×10^6 Ohm-cm^2 for bridged Si nanowires. This value is more than 2 orders of magnitudes lower than that of research based approach of evaporating metals on semiconductor nanowires for contact formation. Individual electrical access to nano-devices without recourse to nanoprobes or tedious and expensive serial interfacing procedures has been achieved for the first time. This unique approach of massively parallel ‘in situ’ epitaxial connections open new opportunities for integration of nanowires for designing novel nano-scale electronic and photonic devices with a major improvement in the cost/performance ratio.