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 | Nanotech 2006 Vol. 3
Technical Proceedings of the 2006 NSTI Nanotechnology Conference and Trade Show, Volume 3
Chapter 1: Nano and Molecular Electronics and Photonics |
| | Three-Dimensional Simulation of Polysilicon Thin Film Transistors with Single-, Double-, and Surrounding-Gate Structures | | Authors: | Y. Li and B-S Lee | | Affilation: | National Chiao Tung University, TW | | Pages: | 86 - 89 | | Keywords: | polysilicon TFT, single-gate, double-gate, surrounding-gate, 3d simulation | | Abstract: | Thin-film-transistors (TFTs) with high mobility and low leakage current are desirable in many applications especially in liquid crystal display (LCD).We have computationally analyzed electrical properties of thin film transistors using three-dimensional (3D) simulation. It is known that the performance of TFTs is limited by the large amount of randomly oriented grain boundaries (GBs) existing in the channel. Furthermore, the random grain orientation leads to significant device-to-device variation and poor circuit yield. To improve the performance of TFT, we for the first time explore and compare the electrical characteristics of the polysilicon TFT with different gate structures. By evaluating the transfer and output characteristics, the surrounding-gate polysilicon TFTs demonstrate better driving capability than that of single-gate and double-gate. It mainly results from that the surrounding-gate TFTs with a sufficiently large coverage ratio, and can improve short channel effects [1-3]. If we have better driving capability of polysilicon TFT transistors, we can increase the performance of pixel as well as possible. So the plate size will become large and brightly colored. | | ISBN: | 0-9767985-8-1 |
| Pages: | 913 |
| Hardcopy: | $185.00 |
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