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 | Nanotech 2005 Vol. 3
Technical Proceedings of the 2005 NSTI Nanotechnology Conference and Trade Show, Volume 3
Chapter 4: Nano Scale Electronics Processing |
| | Nano Tungsten Silicide Thin Film Deposition and its Integration with Poly-Silicon | | Authors: | M. Li and R. Suryanarayanan Iyer | | Affilation: | Applied Materials Inc., US | | Pages: | 287 - 290 | | Keywords: | nano, tungsten, silicide, poly-silicon, single-wafer, integration | | Abstract: | The semiconductor transistor of 90 nm or below generation requires low resistance materials for gate metallization. A thin tungsten silicide (WSix) film is a candidate for the buffer material between poly-silicon and metal, such as tungsten. This layer improves the sheet resistance stability and the adhesion property of the gate metal stack. We report the successful growth of nano scale WSix and introduce a fabrication process for nanometer scale WSix film in a single-wafer CVD chamber. In order to grow nano WSix film with thickness in the range of 30 A to 200 A, the substrate has to be treated and nucleation must be controlled. Si/W ratio is an important film property parameter for the film. Process tuning methods to control film growth and composition are described. A two chamber system is described wherein poly-silicon and WSix can be deposited in an integrated manner. Under this configuration, poly-silicon film is deposited in a poly-silicon single-wafer CVD chamber [1] and then the substrate is moved to the WSix single-wafer CVD chamber through the low pressure N2 ambient transfer chamber. Advantages of integrated deposition are described. [1] US patent 655039, Doped silicon deposition process in resistively heated wafer chamber, S. Wang, et al, (2001) | | ISBN: | 0-9767985-2-2 |
| Pages: | 786 |
| Hardcopy: | $165.00 |
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