Nano Science and Technology Institute
Nanotech 2004 Vol. 2
Nanotech 2004 Vol. 2
Technical Proceedings of the 2004 NSTI Nanotechnology Conference and Trade Show, Volume 2

Chapter 4:


-Simplified Half-Flash CMOS Analog-to-Digital Conveter
 P.B.Y. Tan, A.V. Kordesch and O. Sidek
 Silterra Malaysia, MY
-Pareto-Optimal Modeling for Efficient PLL Optimization
 S.K. Tiwary, S. Velu, R.A. Rutenbar, T. Mukherjee
 Carnegie Mellon University, US
-Scalability and High Frequency Extensions of the Vector Potential Equivalent Circuit (VPEC)
 B. Mukherjee, P. Wang, L. Wang and A. Pacelli
 Stony Brook University, US
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