 | Nanotech 2004 Vol. 2
Technical Proceedings of the 2004 NSTI Nanotechnology Conference and Trade Show, Volume 2
Chapter 3: Compact Modeling |
| - | Technology Limits and Compact Model for SiGe Scaled FETs |
| | R.W. Dutton and C-H Choi |
| | Stanford, US |
| - | Ballistic MOS Model (BMM) Considering Full 2D Quantum Effects |
| | Z. Yu, D. Zhang and L. Tian |
| | Tsinghua University, CN |
| - | Recent Enhancements of MOS Model 11 |
| | R. van Langevelde, A.J. Scholten and D.B.M. Klaassen |
| | Philips Research Laboratories, NL |
| - | Noise Modeling with HiSIM Based on Self-Consistent Surface-Potential Description |
| | M. Miura-Mattausch, S. Hosokawa, D. Navarro, S. Matsumoto, H. Ueno, H.J. Mattausch, T. Ohguro, T. Iizuka, M. Taguchi, T. Kage, and S. Miyamoto |
| | Hiroshima University, JP |
| - | The Development of Next Generation BSIM for Sub-100nm Mixed-Signal Circuit Simulation |
| | X. Xi, J. He, M. Dunga, C-H Lin, B. Heyderi, H. Wan, M. Chan, A.M. Niknejad and C. Hu |
| | University of California at Berkeley, US |
| - | Unified Regional Approach to Consistent and Symmetric DC/AC Modeling of Deep-Submicron MOSFETs |
| | X. Zhou, S.B. Chiah, K. Chandrasekaran, K.Y. Lim, L. Chan and S. Chu |
| | Nanyang Technological University, SG |
| - | Modeling and Characterization of Wire Inductance for High Speed VLSI Design |
| | N.D. Arora and L. Song |
| | Cadence Design Systems, US |
| - | R3, an Accurate JFET and 3-Terminal Diffused Resistor Model |
| | C. McAndrew |
| | Motorola, US |
| - | Advanced MOSFET Modeling for RF IC Design |
| | Y. Cheng |
| | Skyworks Solutions, US |
| - | RF Noise Models of MOSFETs- A Review |
| | S. Asgaran and M. Jamal Deen |
| | McMaster University, CA |
| - | Bias Dependent Modeling of Collector-Base Junction Effects in Bipolar Transistors |
| | H. Tran and M. Schroter |
| | University of Technology Dresden, DE |
| - | Quasi-2D Compact Modeling for Double-Gate MOSFET |
| | M. Chan, T.Y. Man, J. He, X. Xi, C-H Lin, X. Lin, P.K. Ko, A.M. Niknejad and C. Hu |
| | Hong Kong University of Science and Technology, HK |
| - | Compact, Physics-Based Modeling of Nanoscale Limits of Double-Gate MOSFETs |
| | Q. Chen, L. Wang, R. Murali and J.D. Meindl |
| | Georgia Institute of Technology, US |
| - | Floating Gate Devices: Operation and Compact Modeling |
| | P. Pavan, L. Larcher and A. Marmiroli |
| | Università di Modena e Reggio Emilia, IT |
| - | A Non-Charge-Sheet Analytic Theory for Undoped Symmetric Double-Gate MOSFETs from the Exact Solution of Poissons Equation using SPP Approach |
| | J. He, X.i Xi, M. Chan, A. Niknejad and C. Hu |
| | University of California, Berkeley, US |
| - | An Exact Analytic Model of Undoped Body MOSFETs using the SPP Approach |
| | J. He, X. Xi, M. Chan, A. Niknejad and C. Hu |
| | University of California, Berkeley, US |
| - | Linear Cofactor Difference Extrema of MOSFETs Drain Current and Their Application in Parameter Extraction |
| | J. He, X. Xi, M. Chan, A. Niknejad and C. Hu |
| | University of California, Berkeley, US |
| - | Extraction of Extrinsic Series Resistance in RF CMOS |
| | M.S. Alam and G.A. Armstrong |
| | The Queen’s University of Belfast, UK |
| - | Analytic Formulae for the Impact Ionization Rate for use in Compact Models of Ultra-Short Semiconductor Devices |
| | H.C. Morris, M.M. DePass and H. Abebe |
| | San Jose State University, US |
| - | On the Correlations Between Model Process Parameters in Statistical Modeling |
| | J. Slezak, A. Litschmann, S. Banas, R. Mlcousek and M. Kejhar |
| | ON Semiconductor, CZ |
| - | A Trial Report: HiSIM-1.2 Parameter Extraction for 90 nm Technology |
| | Y. Iino |
| | Silvaco Japan, JP |
| - | A Practical Method to Extract Extrinsic Parameters for the Silicon MOSFET Small-Signal Model |
| | S.C. Wang, G.W. Huang, K.M. Chen, A.S. Peng, H.C. Tseng and T.L. Hsu |
| | National Nano Device Laboratories, TW |
| - | Characterization and Modeling of Silicon Tapered Inductors |
| | A.S. Peng, K.M. Chen, G.W. Huang, S.C. Wang, H.Y. Chen and C.Y. Chang |
| | National Nano Device Laboratories, TW |
| - | Improved Compact Model for Four-Terminal DG MOSFETs |
| | T. Nakagawa, T. Sekigawa, T. Tsutsumi, M. Hioki, E. Suzuki and H. Koike |
| | National Institute of Advanced Industrial Science and Technology, JP |
| - | Quantum-Mechanical Analytical Modeling of Threshold Voltage in Long-Channel Double-Gate MOSFET with Symmetric and Asymmetric Gates |
| | J.L. Autran, D. Munteanu, O. Tintori, S. Harrison, E. Decarre and T. Skotnicki |
| | CNRS, FR |
| - | Automatic BSIM3/4 Model Parameter Extraction with Penalty Functions |
| | Y. Mahotin and E. Lyumkis |
| | Integrated Systems Engineering, Inc., US |
| - | An Analytical Subthreshold Current Model for Ballistic Double-Gate MOSFETs |
| | J.L. Autran, D. Munteanu, O. Tintori, M. Aubert and E. Decarre |
| | CNRS, FR |
| - | Threshold-Voltage-Based Regional Modeling of MOSFETs with Symmetry and Continuity |
| | S.B. Chiah, X. Zhou, K. Chandrasekaran, K-Y Lim, L. Chan and S. Chu |
| | Nanyang Technology University, SG |
| - | Physics-Based Scalable Threshold-Voltage Model for Strained-Silicon MOSFETs |
| | K. Chandrasekaran, X. Zhou and S.B. Chiah |
| | Nanyang Technology University, SG |
| - | Predicting the SOI History Effect Using Compact Models |
| | M.H. Na, J.S. Watts, E.J. Nowak, R.Q. Williams and W.F. Clark |
| | IBM Corporation, US |
| - | New Capabilities for Verilog-A Implementations of Compact Device Models |
| | M. Mierzwinski, P. OHalloran, B. Troyanovsky, K. Mayaram and R.W. Dutton |
| | Tiburon Design Automation, US |
| - | Self-Consistent Models of DC, AC, Noise and Mismatch for the MOSFET |
| | C. Galup-Montoro, M.C. Schneider, A. Arnaud and H. Klimach |
| | Universidade Federal de Santa Catarina, BR |
| ISBN: | 0-9728422-8-4 |
| Pages: | 519 |
| Hardcopy: | $150.00 |
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