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 | Nanotech 2004 Vol. 2
Technical Proceedings of the 2004 NSTI Nanotechnology Conference and Trade Show, Volume 2
Chapter 2: Nano Scale Device Modeling |
| | Hierarchical Simulation Approaches for the Design of Ultra-Fast Amplifier Circuits | | Authors: | J. Desai, S. Aboud, P. Chiney, P. Osuch, J. Branlard, S. Goodnick and M. Saraniti | | Affilation: | IIT/Rush University, US | | Pages: | 33 - 36 | | Keywords: | SOI transitor, TeraHerz frequency, PSPICE models | | Abstract: | In this work, the design and development of ultra-fast amplifier circuits is investigated using a combination of simulation tools, including PSPICE. A fully depleted SOI transistor is designed based on state-of-the-art fabricated devices. To calibrate the transistor performance, an analysis of the frequency response is conducted using a fullband particle-based simulation tool, and the device is shown to operated in the TeraHertz regeme. The SOI device parameters are then extracted and are used to build a high frequency amplifier circuit in PSPICE. A full analysis of the impact of design parameters on the dc gain, bandwidth and power consumption is performed. The high-frequency limitations in PSPICE are also investigated. | | ISBN: | 0-9728422-8-4 |
| Pages: | 519 |
| Hardcopy: | $150.00 |
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