Nano Science and Technology Institute
Nanotech 2004 Vol. 1
Nanotech 2004 Vol. 1
Technical Proceedings of the 2004 NSTI Nanotechnology Conference and Trade Show, Volume 1

Chapter 11:

Wafer and MEMS Processing

-Planarize the Sidewall Ripples of Silicon Deep Reactive Ion Etching
 K-Y Weng, M-Y Wang and P-H Tsai
 Industrial Technology Research Institute, TW
-Process Factors in the Reduction of Output Conductance in Sub-micron CMOS
 N.C. May, H.S. Tan and A.V. Kordesch
-Inverse RIE Lag of Silicon Deep Etching
 C.K. Chung and H.N. Chiang
 National Cheng Kung University, TW
-Microscope Slide Electrode Chamber for Nanosecond, Megavolt-Per-Meter Biological Investigations
 Y. Sun, P.T. Vernier, M. Behrend, L. Marcu and M.A. Gundersen
 University of Southern California, US
-Numerical Analysis of Nano-imprinting Process Based on Continuum Hypothesis
 H.C. Kim, Y.S. Woo, W.I. Lee, S.I. Oh and B.S. Kim
 School of Mechanical and Aerospace Engineering, Seoul National University., KR
Order:Mail/Fax Form
© 2017 Nano Science and Technology Institute. All Rights Reserved.
Terms of Use | Privacy Policy | Contact Us | Site Map