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 | Nanotech 2003 Vol. 2
Technical Proceedings of the 2003 Nanotechnology Conference and Trade Show, Volume 2
Chapter 7: Compact Modeling |
| | Vector Potential Equivalent Circuit for Efficient Modeling of Interconnect Inductance | | Authors: | A. Pacelli | | Affilation: | SUNY-Stony Brook, US | | Pages: | 298 - 301 | | Keywords: | interconnects, inductance, vector potential, model reduction | | Abstract: | We present a compact topology for inductive parasitics, using the vector potential as a state variable. The model is local, i.e., only coupling between neighboring wires is explicitly modeled. However, the topology accounts for long-range coupling by propagating the vector potential from one wire to the next. Examples of rule-based generation and model reduction are presented for a digital bus. |  | View paper | | ISBN: | 0-9728422-1-7 |
| Pages: | 600 |
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