Authors: W.R. Smith
Affilation: National Semiconductor Corporation, United States
Pages: 222 - 227
Keywords: RF/wireless communication, device and circuit simulation, boundary-element method, CAD, LTCC
Rapidly increasing functionality and performance of RF/wireless communication products, along with mandated decreases in size, weight, and cost, have created a critical need to replace discrete, surface-mounted passive circuit components with embedded passives in substrate technologies such as Low-Temperature Cofired Ceramic (LTCC). The design process for embedded passives requires rapid electromagnetic simulation with full mutual coupling among all embedded structures, to allow each design-refining iteration to be carried out in a few minutes. Full-wave "2.5-D planar" solvers perform the right type of simulation, but typically require run times of hours to days and sometimes cannot accommodate the required circuit/layout complexity. In order to achieve results of comparable accuracy in the RF/wireless frequency range, with simulation times of a few minutes, we have used the well-known Partial-Element Equivalent-Circuit (PEEC) modeling technique to develop a simulator that is used in the same way as existing multi-layer planar solvers.