 | MSM 98
Technical Proceedings of the 1998 International Conference on Modeling and Simulation of Microsystems
Chapter 9: Applications: Semiconductors |
| - | The Influence of Space Quantization Effect on the Threshold Voltage, Inversion Layer and Total Gate Capacitance in Scaled Si-MOSFETs |
| | D. Vasileska and D.K. Ferry |
| | Arizona State University, U.S.A. |
| - | Concurrent Process, Device and Integrated Circuit Development by Predictive Engineering for Smart Power Technologies |
| | M. Bafleur, T. Dinh, H. Park, R. Thoma, T. Zirkle and A. Wild |
| | LAAS/CNRS, France |
| - | Simulations of a New CMOS Compatible Method to Enhance the Breakdown Voltage of Highly-Doped Shallow PN Junctions |
| | A. Pauchard, P.A. Besse and R.S. Popovic |
| | EPFL, Switzerland |
| - | Hierarchical Approach to Simulation in a Vertical System for the TriCore Microcontroller |
| | C. Salzmann, E. Chesters, P. Coelho, Y-C Fu, J. Madala, M. Reddy and F. Wang |
| | Siemens Microelectronics, Inc., U.S.A. |
| - | A Physics-Based Characterized Model for an Ultrafast Planar Rectifier |
| | Z. Hossain, W. Fragale, W. Simpson and G. Dashney |
| | Motorola, Inc., U.S.A. |
| - | Cellular Automata Studies of Vertical MOSFETs |
| | M. Saraniti, S. Wigger, G. Zandler, G. Formicone and S.M. Goodnick |
| | Arizona State University, U.S.A. |
| - | Simulation of Narrow-Width Effects in Sub-Half-Micron n-MOSFETs with LOCOS Isolation |
| | K.V. Loiko, I.V. Peidous, H-M Ho and D.H. Lim |
| | Chartered Semiconductor Manufacturing Ltd., Singapore |
| - | Breakdown in the Output Characteristics of Deep Submicron, a-Si:H TFTs |
| | L. Colalongo, M. Valdinoci, G. Forunato, L. Mariucci and M. Rudan |
| | University of Bologna, Italy |
| ISBN: | 0-96661-35-0-3 |
| Pages: | 678 |
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