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 | Nanotech 2002 Vol. 1
Technical Proceedings of the 2002 International Conference on Modeling and Simulation of Microsystems
Chapter 11: Semiconductor Device Modeling |
| | A Comprehensive Modeling of MOS Transistors in a 0.35um Technology for Analog and Digital Applications | | Authors: | A. Keshavarz, P. Khare and R. Sampson | | Affilation: | STMicroelectronics, USA | | Pages: | 604 - 607 | | Keywords: | MOS modeling, 0.35um MOS transistor, temperature effects in MOS transistors | | Abstract: | The purpose of this work is to present a comprehensive report of the MOS transistor characteristics in a 0.35um technology, both types being surface devices. Results include extensive geometrical and temperature dependencies of the most important transistor parameters needed for all applications specially the Analog. N and PMOS threshold voltage, saturation current, maximum transconductance, as well as the output resistance in saturation and linear region were the selected parameters for this investigation. Graphical results show accurate dependency of each of these parameters on geometry and temperature. |  | View paper | | ISBN: | 0-9708275-7-1 |
| Pages: | 764 |
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