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 | Nanotech 2001 Vol. 1
Technical Proceedings of the 2001 International Conference on Modeling and Simulation of Microsystems
Chapter 12: Software Tools, CAD Systems |
| | Fail Pattern Classification and Analysis System of Memory Fail Bit Maps | | Authors: | K. Nakamae, A. Itoh and H. Fujioka | | Affilation: | Osaka University, Japan | | Pages: | 598 - 601 | | Keywords: | memory fail bit map, fail pattern classification, cause estimation, expert knowledge | | Abstract: | In order to determine problematic wafer processing steps rapidly during memory production, the system that classifies failure patterns from memory fail bit maps (FBMs) and estimates the cause of failure is proposed. The system mainly consists of three procedures, the macro level failure pattern classification, the micro level failure pattern classification andÅ@the cause estimation based on the comparison of two level classified results with the expert knowledge. In the macro and micro levels, the failure patterns are classified into five and eleven categories, respectively. The system was applied to fail bit map data from recent DRAM devices to show its validity. |  | View paper | | ISBN: | 0-9708275-0-4 |
| Pages: | 638 |
| Hardcopy: | $100.00 |
| Special: | 3 CD Set — 15% off with Free Shipping |
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